Sr Hardware Design Engineer - PCIe Interface - Hybrid

Santa Clara, CA • San Jose, CA • San Francisco, CA • San Diego, CA • Los Angeles, CA Hybrid
Full-time $170,000.00 - $250,000.00
Posted 01/05/2023

Founded in 2016 and headquartered in the San Francisco Bay Area, we are building the worlds fastest AI supercomputer meaning the smallest, fastest and greenest general-purpose chip with wide applications in hyperscale data centers, private cloud, and AI/high-performance computing.

We are actively interviewing for a Sr Hardware Design Engineer who has experience implementing, debugging, and verifying a high-performance PCIe interface including helping build the infrastructure to support PCIe during FPGA emulation and bringup.

Top Reasons to Work with Us

  • Join a well funded startup having an immediate impact day 1!
  • Competitive Base + Equity
  • Medical, Dental, Vision, 401K
  • PTO, Holidays, Remote Work, and more!

    • What You Will Be Doing

  • Working with a small team to implement, debug, and verify a high-performance PCIe interface
  • Build the infrastructure to support PCIe during FPGA emulation and bringup

    • What You Need for this Position

  • BS in related field
  • 10+ years of experience
  • PCIe controller/device design
  • Bus traffic analyzers and logic analyzers
  • Data eye and BER analysis
  • Verilog / System Verilog / Synthesis / STA / CDC / Lint experience
    • So if you are a Sr Hardware Design Engineer w/ PCIe Interface experience, please apply today!

    For this position you must be currently authorized to work in the United States. We do not sponsor for this position.

    Additional ways to apply

    Preferred Skills

    Caroline Veillon is recruiting for this position and the positions below.
    email meEmail me to apply for this position

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    Employees will receive paid leave to the extent required by state or local law. This job was first posted by CyberCoders on 01/05/2023 and applications will be accepted on an ongoing basis until the position is filled or closed.

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